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Imaging and Spectroscopy - Monolithic InGaAs-on-silicon Short Wave Infrared Detector Arrays (1997)

Abhay M. Joshi, René Brown, Eugene A. Fitzgerald, Xinde Wang, Steve Ting & Mayank Bulsara

a Discovery Semiconductors Inc., Ewing, NJ, 08628
b Massachusetts Institute of Technology, Cambridge, MA 02139


We have designed and developed 1, 16, 256, and 512 element linear Monolithic InGaAs-on-silicon infrared Detector Arrays for the 1-3 µm SWIR band. A methodology of monolithically integrating InGaAs photodetectors and high density complex CMOS readout electronics all on a single silicon substrate has been developed. The innovation consists of an improved "selective" epitaxial technique that significantly reduces the misfit dislocation density (<106/cm2) caused by the severe lattice mismatch (8 to 10%) between the InxGa1-xAs (x = 0.53 to 0.82) photodetector's absorption region and the silicon substrate. The individual pixel size of (40x40) and (80x80) µm2 exhibits room temperature RoA product of 40 to 45 Ohm-cm2. The InGaAs photodetectors are operated at a zero bias voltage to eliminate leakage current integration, reduce the l/f noise, and maintain an uniform bias for light detection. The CMOS readout circuitry for each individual pixel consists of an integrating pre-amplifier, a CDS signal processor, and a voltage to current converter. the column scanner for the linear array is a D type shift register with a master clear signal reset once per frame. The master clock signal shifts the bit through the registers one column per clock cycle. When a pixel is selected, the output signal at the voltage to current converter is coupled to a transimpedance amplifier. This amplifier drives the line capacitance of the output bus line a achieve 25 MHz output speed. power dissipation of less than 100 mW has been demonstrated for 10 MHz operation.

Keywords: Selective epitaxy, Infrared Detector Arrays, Monolithic InGaAs-on-silicon, CMOS Readout Circuitry.

*Published in SPIE Vol. 2999, pp. 211-224, 1997

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